Selected Journal Articles
Supervised students are delineated with an asterisk

[J31] A. Ehsan*, H. An*, Z. Zhou, Y. Yi, “A Novel Approach for using TSVs as Membrane Capacitance in Neuromorphic 3D," IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems (TCAD), 2017.

[J30] Mosleh*, L. Liu, C. Sahin, R. Zheng, Y. Yi, “BrainInspired Wireless Communications: Where Reservoir Computing Meets MIMOOFDM," IEEE Transactions on Neural Networks and Learning Systems (TNNLS), 2017.

[J29] C. Zhao*, K. Hamedani*, J. Li*, Y. Yi, “Analog Spiketimingdependent Resistive Crossbar Design for Brain Inspired Computing," IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), 2017.

[J28] Hamedani, L*. Liu, R. Atat*, J. Wu, Y. Yi, “Reservoir Computing Meets Smart Grids: Attack Detection using Delayed Feedback Networks," IEEE Transactions on Industrial Informatics (TII), 2017.

[J27] H. An*, A. Ehsan*, Z. Zhou, F. Shen, Y. Yi, “Monolithic 3D Neuromorphic Computing System with Hybrid CMOS and Memristorbased Synapses and Neurons," Integration, the VLSI Journal  Elsevier, 2017.

[J26] C. Zhao*, Y. Yi, J. Li*, X. Fu, and L. Liu, “InterSpike Intervals (ISI) based Analog SpikeTimeDependent Encoder for Neuromorphic Processors,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2017.

[J25] R. Atat*, L. Liu, H. Chen, J. Wu, H. Li, and Y. Yi, “Enabling CyberPhysical Communication in 5G Cellular Networks: Challenges, Spatial Spectrum Sensing, and CyberSecurity,” IET CyberPhysical Systems: Theory & Applications, 2017.

[J24] J. Li*, R. Atat*, L. Liu, and Y. Yi, “Enabling Sustainable Cyber Physical Security Systems through Neuromorphic Computing,” IEEE Transactions on Sustainable Computing (TSUSC), 2017.

[J23 ] R. Atat*, L. Liu, H. Chen, J. Wu, H. Li, and Y. Yi, “Enabling CyberPhysical Communication in 5G Cellular Networks: Challenges, Spatial Spectrum Sensing, and CyberSecurity,” IIET CyberPhysical Systems: Theory & Applications, vol. 2, no. 1, pp. 49 – 54, 2017.

[J22] J. Tan, M. Chen, Y. Yi, X. Fu, “Mitigating the Impact of Hardware Variability for GPGPUs Register File,” IEEE Transactions on Parallel and Distributed Systems (TPDS) ,vol. 27, no. 11, pp. 32833297, 2016.

[J21] R. Atat*, L. Liu, and Y. Yi, “Energy HarvestingBased D2DAssisted MachineType Communications,” IEEE Transactions on Communications (TCOM), 2016.

[J20] C. Zhao*, B. Wysocki, C. Thiem, N. McDonald, J. Li*, and Y. Yi, “Energy Efficient Spiking Temporal Encoder Design for Neuromorphic Computing Systems,” IEEE Transactions on MultiScale Computing Systems (TMSCS),vol. 2, no. 4, pp. 265  276, 2016.

[J18] Y. Yi, Y. Liao, B. Wang, X. Fu, Y. Hou, F. Shen, “FPGA based Spike Time Dependent Encoder and Reservoir Design in Neuromorphic Computing Processors,” Journal of Microprocessors and Microsystems: Embedded Hardware Design (Elsevier), available online, ISSN 01419331, 2016.

[J17] H. An*, X. Fu, J. Li*, F. Shen, and Y. Yi, "Three Dimensional Memristor Based Neuromorphic Computing System and its Application to Cloud Robotics," Computers & Electrical Engineering an International Journal (Elsevier), invited, 2016.

[J16] M. Amimul Ehsan*, Z. Zhou, and Y. Yi, "An Analytical Through Silicon Via (TSV) Surface Roughness Model Applied to a Millimeter Wave 3D IC," IEEE Transactions on Electromagnetic Capability (EMC), vol. 57, no. 4, pp. 815826, 2015.

[J15] C. Zhao*, B. T. Wysocki, Y. Liu, C. D. Thiem, N. R. McDonald, and Y. Yi, "SpikeTimeDependent Encoding for Neuromorphic Processors," ACM Journal on Emerging Technologies in Computing Systems (JETC), vol. 12, no. 3, pp. 23 – 46, 2015.

[J14] M. Amimul Ehsan*, Z. Zhou, and Y. Yi, "Analytical Modeling and Analysis of Through Silicon Vias (TSVs) in High Speed ThreeDimensional System Integration," Progress in Electromagnetics Research (PIER) Journal, M, vol. 42, 49–59, 2015.

[J13] M. Amimul Ehsan*, Z. Zhou, and Y. Yi, "Development of an Equivalent Circuit Model of a Finite Ground Coplanar Waveguide Interconnect in MIS System for UltraBroadband Monolithic ICs," Progress in Electromagnetics Research (PIER) Journal, vol. 56, pp. 113, 2015.

[J12] Y. Li*, L. Liu, H. Li, J. Zhang, and Y. Yi, "Resource Allocation for DelaySensitive Traffic over LTEAdvanced Relay Networks," IEEE Transactions on Wireless Communications, vol. 14, no. 8, pp. 4291  4303, 2015.

[J11] C. Zhao*, J. Liu, F. Shen, and Y. Yi, "Low Power CMOS Power Amplifier Design for RFID and the Internet of Things," Computers & Electrical Engineering an International Journal (Elsevier), DOI: 10.101, 2015.

[J10] L. Liu, Y. Yi, J.F. Chamberland, and J. Zhang, "EnergyEfficient Power Allocation for DelaySensitive Multimedia Traffic over Wireless Systems," IEEE Transactions on Vehicular Technology, vol. 63, no. 5, pp.20382047, 2014.

[J9] H. Chen, L. Liu, Y. Li, B. Yu, L. Shi, and Y. Yi, "Devicetodevice communications in cellular networks," IEEE COMSOC MMTC ELetter, vol. 9, no. 1, pp. 2933, 2014.

[J8] Y. Yi, “What is Monolithic Threedimensional (3D) Integration,” ACM/SIGDA ENewsletter, vol. 44, no. 5, pp. 1617, 2014.

[J7] Y. Yi, Y. Zhou, X. Fu, and F. Shen, "Modeling Differential ThroughSiliconVias (TSVs) with Voltage Dependent and Nonlinear Capacitance," Journal of Selected Areas in Microelectronics (JSAM), Cyber Journals, vol.3, no. 6, pp. 19, 2013.

[J6] J. Tan, Y. Yi, F. Shen, and X. Fu, "Modeling and Characterizing GPGPU Reliability in the Presence of Soft Errors," ELSEVIER Journal of Parallel Computing, vol. 39, no. 9, pp. 520532, 2013.

[J5] L. Liu, J. Zhang, Y. Yi, H. Li, and J. Zhang, "Combating Interference: MUMIMO, CoMP, and HetNet," Journal of Communications, Academy Publisher, vol. 7, no. 9, pp. 646655, 2012.

[J4] Y. Yi, R. Wenzel, V. Sarin, and W. Shi, "Inductance Extraction for Interconnects in the Presence of Nonlinear Magnetic Materials," IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems (TCAD), vol. 28, no. 7, pp. 11061110, 2009.

[J3] Y. Yi, P. Li, V. Sarin, and W. Shi, "A Preconditioned Hierarchical Algorithm for Impedance Extraction of ThreeDimensional Structures With Multiple Dielectrics," IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems (TCAD), vol. 27, no. 11, pp. 19181927, 2008.

[J2] Y. Yi, X. He, and H. Luo, "Design and Performance Evaluation of List Sphere Detector," Journal of Shanghai Jiao Tong University (Science), pp. 2628, 2005.

[J1] Y. Yi, L. Liu, and C. Xu, "Optimal Fusion Scheme in Distributed Sensor Networks," Journal of Communication Technology, pp. 5053, 2005.
Selected Conference Papers

[C49] A. Ehsan*, H. An*, Z. Zhou, and Y. Yi, “Adaptation of Enhanced TSV Capacitance as Membrane Property in 3D Braininspired Computing System,” in Proceedings of IEEE/ACM Design Automation Conference (DAC), 2017.

[C48] H. An*, Z. Zhou, and Y. Yi, “MemristorBased 3D Neuromorphic Computing System and Its Application to Associative Memory Learning,” in Proceedings of IEEE Nanotechnology Conference, 2017.

[C47] H. An*, Z. Zhou, and Y. Yi, “3D Memristorbased Adjustable Deep Recurrent Neural Network with Programmable Attention Mechanism,” in Proceedings of Neuromorphic Computing Symposium, 2017.

[C46] C. Zhao*, J. Li*, H. An, and Y. Yi, “When Energy Efficient SpikeBased Temporal Encoding Meets Resistive Crossbar: From Circuit Design to Application,” in Proceedings of Neuromorphic Computing Symposium, 2017.
[C45] A. Ehsan*, Z. Zhou, and Y, Yi, “Neuromorphic 3D Integrated Circuit: A Hybrid, Reliable and Energy Efficient Approach for Next Generation Computing,” in Proceedings of ACM Great Lakes Symposium on VLSI (GLSVLSI), (Best Paper Award Finalist) 2017.

[C44] Y, Yi, and L. Liu, "Deep Recurrent Neural Network meets MIMOOFDM: Adaptive Transmit Symbol Detection Through BrainInspired Computing Architecture," DAC WorkinProgress Session, 2017.

[C43] A. Ehsan*, Z. Zhou, and Y, Yi, “Modeling and analysis of neuronal membrane electrical activities in 3d neuromorphic computing system,” in Proceedings of IEEE International Symposium on Electromagnetic Compatibility (EMC), 2017.

[C42] C. Zhao*, J. Li*, and Y. Yi, "Energy efficient analog IC design for data compression in spiking neuromorphic systems," DAC WorkinProgress Session, 2017.

[C41] H. An*, Z. Zhou, and Y, Yi, “Opportunities and Challenges on Nanoscale 3D Neuromorphic Computing System,” in Proceedings of IEEE International Symposium on Electromagnetic Compatibility (EMC), 2017.

[C40] C. Zhao*, J. Li*, and Y, Yi, “Making neural encoding robust and energyefficient: an advanced analog temporal encoder for braininspired computing systems,” in Proceedings of IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2016.

[C39] R. Atat*, L. Liu, and Y, Yi, “Improving Spectral Efficiency of D2D Cellular Networks Through RF Energy Harvesting,” in Proceedings of IEEE Global Communications Conference (GLOBECOM), 2016. (Best Paper Award)

[C38] H. An*, Z. Zhou, and Y, Yi, “Opportunities and Challenges on Nanoscale 3D Neuromorphic Computing System,” in Proceedings of IEEE International Symposium on Electromagnetic Compatibility (EMC), invited, 2017.

[C37] H. An*, M. Ehsan*, Z. Zhou, and Y, Yi, "Electrical Modeling and Analysis of 3D Synaptic Array using Vertical RRAM Structure,” in Proceedings of IEEE International Symposium on Quality Electronic Design (ISQED), (Best Paper Award Finalist) 2017.

[C36] J. Li*, C. Zhao*, and Y, Yi, “Energy Efficient and Compact Analog Integrated Circuit Design for Delaydynamical Reservoir Computing System,” Special Session in “Hardware in Reservoir Computing”, IEEE International Joint Conference on Neural Networks (IJCNN), invited, 2017.

[C35] J. Li*, C. Zhao*, and Y, Yi, “Analog Spiking Temporal Encoder with Interspike Intervals with Verification and Recovery Scheme for Neuromorphic Computing Systems,” in Proceedings of IEEE International Symposium on Quality Electronic Design (ISQED), 2017.

[C34]A. Ehsan*, Z. Zhou, and Y, Yi, “3D Integration Meets Neuromorphic Computing: A Novel Way to Reach a High Performance and Energy Efficient Computing System,” in Proceedings of IEEE International Symposium on VLSI Design, Automation and Test (VLSIDAT), invited, 2017.

[C33] R. Atat*, L. Liu, and Y, Yi, “Privacy Protection Scheme for eHealth Systems: A Stochastic Geometry Approach,” in Proceedings of IEEE Global Communications Conference (GLOBECOM), 2016.

[C32] H. An*, A. Ehsan*, Z. Zhou, and Y, Yi, “Electrical Modeling and Analysis of 3D Neuromorphic IC with Monolithic Intertier Vias,” in Proceedings of IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), 2016.

[C31] S Mosleh*, H. Hou*, L. Liu, and Y, Yi, “Coordinated Data Assignment: A novel scheme for Big Data Over Cached CloudRAN,” in Proceedings of IEEE Global Communications Conference (GLOBECOM), 2016.

[C30] C. Zhao*, J. Li*, and Y, Yi, “Novel Spike Based Reservoir Node Design with High Performance Spike Delay Loop,” in Proceedings of ACM International Conference on Nanoscale Computing and Communication (NanoCom), 2016.

[C29] H. Chen, L. Liu, N. Mastronarde, L. Ma, and Y, Yi, “Cooperative Retransmission for Massive MTC under Spatiotemporally Correlated Interference,” in Proceedings of IEEE Global Communications Conference (GLOBECOM), 2016.

[C28] R. Atat*, L. Liu, and Y, Yi, “Improving Spectral Efficiency of D2D Cellular Networks Through RF Energy Harvesting,” in Proceedings of IEEE Global Communications Conference (GLOBECOM), 2016.

[C27] S Mosleh*, C Sahin, L Liu, R Zheng, and Y, Yi, “An Energy Efficient Decoding Scheme for nonlinear MIMOOFDM Network using Reservoir Computing,” in Proceedings of IEEE International Joint Conference on Neural Networks (IJCNN), 2016.

[C26] C. Zhao* and Y, Yi, “Novel Spiking Temporal Encoder for Braininspired Computing Systems,” IEEE/ACM Design Automation Conference (DAC) WorkinProgress Session, 2016.

[C25] H. Chen, R. Atat*, L. Liu, and Y, Yi, “Performance Analysis on NanoNetworks: A Stochastic Geometry Approach,” in Proceedings of ACM International Conference on Nanoscale Computing and Communication (NanoCom), 2016.

[C24] A. Ehsan*, H. An*, Z. Zhou, and Y, Yi, “Design Challenges and Methodologies in 3D Integration for Neuromorphic Computing Systems,” in Proceedings of IEEE International Symposium on Quality Electronic Design (ISQED), 2016.

[C23] A. Ehsan*, Z. Zhou, and Y, Yi, “Modeling and Optimization of TSV for Crosstalk Mitigation in 3D Neuromorphic System,” in Proceedings of IEEE International Symposium on Electromagnetic Compatibility (EMC), 2016.

[C22] A. Ehsan*, Z. Zhou, and Y, Yi, "Three Dimensional Integration Technology Applied to Neuromorphic Hardware Implementation,” in Proceedings of IEEE International Symposium on Nanoelectronic and Information System (INIS), 2015.

[C21] C. Zhao*, W. Danesh*, B. T. Wysocki, and Y, Yi, "Neuromorphic Encoding System Design with Chaos Based CMOS Analog Neuron,” in Proceedings of IEEE Symposium on Computational Intelligence for Security and Defense Applications (CISDA), pp. 7681, 2015.

[C20] A. Ehsan*, Z. Zhou, X. Fu, and Y, Yi, "Comprehensive Study of Through Silicon Via (TSV) Modeling and Analysis in High Speed Three Dimensional Integrated Circuits (3D IC),” in Proceedings of Progress in Electromagnetic Research Symposium, 2015.

[C19] W. Danesh*, C. Zhao*, B. T. Wysocki, M. J. Medley, N. Thawdar, and Y. Yi, “Channel Estimation in Wireless OFDM Systems Using Reservoir Computing,” in Proceedings of IEEE Symposium on Computational Intelligence for Security and Defense Applications (CISDA), pp. 127131, 2015.

[C18] A. Ehsan*, Z. Zhou, and Y, Yi, “A Simple Equivalent Circuit Model of Finite Ground Coplanar Waveguide (FGCPW) on MIS for Broadband Monolithic Photodiode Application,” in Proceedings of Progress in Electromagnetic Research Symposium, 2014.

[C17] A. Ehsan*, Z. Zhou, and Y. Yi, "Electrical Modeling and Analysis of Sidewall Roughness of Through Silicon Vias in 3D Integration," in Proceedings of IEEE International conference on Electromagnetic Compatibility (EMC), pp. 5256, 2014.

[C16] A. Ehsan*, M. K. Siddiki, and Y. Yi, “Numerical analysis and optimum design of efficient μcSi/μcSi1−xGexthinfilm solar cells,” in Proceedings of IEEE Photovoltaic Specialist Conference (PVSC), pp. 13211325, 2014.

[C15] Y. Yi and Y. Zhou, "Differential TSV Modeling and Design Optimization to Benefit 3D IC Performance," in Proceedings of IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)/em>, pp. 195198, 2013.

[C14] Y. Yi and Y. Zhou, "A Novel Circuit Model for Multiple ThroughSiliconVias (TSVs)," in Proceedings of IEEE International Conference on 3D System Integration (3D IC), pp. 5154, 2013.

[C13] Y. Li, H. Li, and Y. Yi, “Adaptive Resource Allocation for Traffic over Heterogeneous Relay Networks,” in Proceedings of IEEE International Conference on Communication (ICC), pp. 54315436, 2013.

[C12] Y. Yi, M. Chen, G. Yu, Y. Zhou, and D. Ma, "Modeling and Optimizing Differential Signaling for Reducing Crosstalk Noise,"in Proceedings of IEEE International Symposium on VLSI Design, Automation and Test (VLSIDAT), 2011. (Best Paper Finalist)

[C11] M. Chen, Y. Yi, and W. Zhao, "VariationAware Deep Nanometer Gate Performance Modeling: An Analytical Approach," in Proceedings of IEEE International Symposium on VLSI Design, Automation and Test (VLSIDAT), 2011.

[C10] S. Liu, H. Li, G. Ru, W. Lin, L. Liu, Y. Yi, “Capacity of Multicarrier Multilayer Broadcast and Unicast Hybrid Cellular System with Independent Channel Coding over Subcarriers,” in Proceedings of Vehicular Technology Conference (VTC), 2011..

[C9] G. Yu and Y. Yi, "Subthreshold Analog Circuit Synthesis with Yield Optimization," in Proceedings of IEEE International Symposium on VLSI Design, Automation and Test (VLSIDAT), 2011.

[C8] F. Yi, Y. Yi, and L. Liu, "Optimal fusion scheme in wireless sensor networks under sumrate capacity constraint," in the Proceedings of IEEE Conference on Information Sciences and Systems (CISS), 2010.

[C7] Y. Yi, Y. Liu, Y. Zhou, and W. Becker, "Minimizing crosstalk in highspeed differential buses by optimizing power/ground and signal assignment," in Proceedings of 18th IEEE conference on Electrical Performance of electronic Packaging (EPEP), pp. 255258, 2009.

[C6] Y. Yi, V. Sarin, and W. Shi, "An efficient inductance extraction algorithm for 3D interconnects with frequency dependent nonlinear magnetic materials," in Proceedings of 17th IEEE conference on Electrical Performance of electronic Packaging (EPEP), pp. 217220, 2008.

[C5] Y. Yi, S. Yan, V. Sarin, and W. Shi, "Development of Fast 3D Parasitic Extraction using Hierarchical Method for Integrated Circuits and Packages," in Proceedings of IEEE International Symposium on Antennas and Propagation (APS), pp. 14, 2008. (Invited Paper)

[C4] Y. Yi, and W. Shi, "Algorithmic Techniques for Parasitic Extraction of 3D VLSI Circuits," in 11th Annual ACM/SIGDA Ph.D. Forum at IEEE Design Automation Conference (DAC), 2008.

[C3] Y. Yi, P. Li, V. Sarin, and W. Shi, "Impedance Extraction for 3D Structures with Multiple Dielectrics using Preconditioned Boundary Element Method," in Proceedings of IEEE/ACM International Conference on ComputerAided Design (ICCAD), pp. 811, 2007.

[C2] Y. Yi, V. Sarin, and W. Shi, "A Preconditioned Hierarchical Algorithm for Impedance Extraction of Interconnects," in Proceedings of IEEE Electrical Performance of Electronic Packaging (EPEP), pp. 99102, 2006. (Best Student Paper Finalist)

[C1] Y. Yi, H. Zhang, and C. Xu, "Design of LDPC Codes for MIMO Channel to Achieve Ergodic Capacity using Linear Programming," in Proceedings of IEEE Vehicular Technology Conference (VTC), pp. 532535, 2005.

Patents
“Functional Screening of Static Random Access Memories Using an Array Bias Voltage,” United States Patent and Trademark Office (USPTO) (No. 9,208,832), 2015.